ELECTROSTATIC DISCHARGE (ESD) SENSITIVITY TESTING HUMAN BODY MODEL (HBM)standard by JEDEC Solid State Technology Association, 12/01/2008

JC-42.6 MANUFACTURER IDENTIFICATION (ID) CODE FOR LOW POWER MEMORIESstandard by JEDEC Solid State Technology Association, 03/01/2014

SELECTION OF BURN-IN/LIFE TEST CONDITIONS AND CRITICAL PARAMETERS FOR QML MICROCIRCUITSstandard by JEDEC Solid State Technology Association, 09/01/2015

ADDENDUM No. 9 to JESD24 - SHORT CIRCUIT WITHSTAND TIME TEST METHODAmendment by JEDEC Solid State Technology Association, 08/01/1992

SERIAL FLASH DISCOVERABLE PARAMETERS (SFDP)standard by JEDEC Solid State Technology Association, 05/01/2014

Potential Failure Mode and Effects Analysis (FMEA)standard by JEDEC Solid State Technology Association, 08/01/2018

GUIDELINES FOR THE MEASUREMENT OF THERMAL RESISTANCE OF GaAs FETSstandard by JEDEC Solid State Technology Association, 07/01/1988

STEADY-STATE TEMPERATURE HUMIDITY BIAS LIFE TESTstandard by JEDEC Solid State Technology Association, 03/01/2009

IC LATCH-UP TESTstandard by JEDEC Solid State Technology Association, 09/01/2010

GUIDELINE FOR RESIDUAL GAS ANALYSIS (RGA) FOR MICROELECTRONIC PACKAGESstandard by JEDEC Solid State Technology Association, 07/01/2002

TEMPERATURE, BIAS, AND OPERATING LIFEstandard by JEDEC Solid State Technology Association, 06/01/2005

Guidelines for Visual Inspection and Control of Flip Chip Type Components (FCxGA)standard by JEDEC Solid State Technology Association, 01/01/2013