HIGH TEMPERATURE STORAGE LIFEstandard by JEDEC Solid State Technology Association, 11/01/2004

NAND Flash Interface Interoperabilitystandard by JEDEC Solid State Technology Association, 10/01/2016

SOLDER BALL SHEARstandard by JEDEC Solid State Technology Association, 05/01/2014

1.8 V HIGH-SPEED LVCMOS (HS_LVCMOS) INTERFACEstandard by JEDEC Solid State Technology Association, 03/01/2018

THERMAL TEST ENVIRONMENT MODIFICATIONS FOR MULTICHIP PACKAGESstandard by JEDEC Solid State Technology Association, 07/01/2008

TEMPERATURE, BIAS, AND OPERATING LIFEstandard by JEDEC Solid State Technology Association, 07/01/2017

PRECONDITIONING OF PLASTIC SURFACE MOUNT DEVICES PRIOR TO RELIABILITY TESTINGstandard by JEDEC Solid State Technology Association, 10/01/2008

ADDENDUM No. 4 to JESD8 - CENTER-TAP-TERMINATED (CTT) INTERFACE LOW-LEVEL, HIGH-SPEED INTERFACE STANDARD FOR DIGITAL INTEGRATED CIRCUITSstandard by JEDEC Solid State Technology

STANDARD FOR MEASURING FORWARD SWITCHING CHARACTERISTICS OF SEMICONDUCTOR DIODESstandard by JEDEC Solid State Technology Association, 02/01/2000

EARLY LIFE FAILURE RATE CALCULATION PROCEDURE FOR SEMICONDUCTOR COMPONENTSstandard by JEDEC Solid State Technology Association, 02/01/2007

ELECTRICALLY ERASABLE PROGRAMMABLE ROM (EEPROM) PROGRAM/ERASE ENDURANCE AND DATA RETENTION TESTstandard by JEDEC Solid State Technology Association, 08/01/2018

STANDARD TEST AND PROGRAMMING LANGUAGE (STAPL)standard by JEDEC Solid State Technology Association, 08/01/1999