COMPONENT QUALITY PROBLEM ANALYSIS AND CORRECTIVE ACTION REQUIREMENTS (INCLUDING ADMINISTRATIVE QUALITY PROBLEMS)standard by JEDEC Solid State Technology Association, 12/01/1999

ADDENDUM No. 4 to JESD12 - METHOD OF SPECIFICATION OF PERFORMANCE PARAMETERS FOR CMOS SEMICUSTOM INTEGRATED CIRCUITSAmendment by JEDEC Solid State Technology

EMBEDDED MULTIMEDIACARD (e*MMC) PRODUCT STANDARD, STANDARD CAPACITYstandard by JEDEC Solid State Technology Association, 07/01/2007

DEFINITION OF THE SSTE32882 REGISTERING CLOCK DRIVER WITH PARITY AND QUAD CHIP SELECTS FOR DDR3/DDR3L/DDR3U RDIMM 1.5 V/1.35 V/1.25 V APPLICATIONSstandard by

SERIAL FLASH RESET SIGNALING PROTOCOLstandard by JEDEC Solid State Technology Association, 10/01/2018

SOLDER BALL PULLstandard by JEDEC Solid State Technology Association, 08/01/2010

DEFINITION OF THE SSTU32864 1.8-V CONFIGURABLE REGISTERED BUFFER FOR DDR2 RDIMM APPLICATIONSstandard by JEDEC Solid State Technology Association, 10/01/2004

Terms, Definitions, and Letter Symbols for Discrete Semiconductor and Optoelectronic Devicesstandard by JEDEC Solid State Technology Association, 08/01/2012

STANDARD FOR DESCRIPTION OF 2.5 V CMOS LOGIC DEVICES WITH 3.6 V CMOS TOLERANT INPUTS AND OUTPUTSstandard by JEDEC Solid State Technology

PACKAGE WARPAGE MEASUREMENT OF SURFACE-MOUNT INTEGRATED CIRCUITS AT ELEVATED TEMPERATUREstandard by JEDEC Solid State Technology Association, 10/01/2009

INSTRUMENTATION CHIP DATA SHEET FOR FBDIMM DIAGNOSTIC SENSELINESstandard by JEDEC Solid State Technology Association, 11/01/2006

DDR4 REGISTER CLOCK DRIVER (DDR4RCD01)standard by JEDEC Solid State Technology Association, 08/01/2016