BALL GRID ARRAY PINOUTS STANDARDIZED FOR 32-BIT LOGIC FUNCTIONSstandard by JEDEC Solid State Technology Association, 11/01/1999

STANDARD FOR CHAIN DESCRIPTION FILEstandard by JEDEC Solid State Technology Association, 06/01/1996

STANDARD TEST METHOD UTILIZING X-RAY FLUORESCENCE (XRF) FOR ANALYZING COMPONENT FINISHES AND SOLDER ALLOYS TO DETERMINE TIN (Sn) - LEAD (Pb) CONTENTstandard

GUIDELINES FOR PACKING AND LABELING OF INTEGRATED CIRCUITS IN UNIT CONTAINER PACKING (TUBES, TRAYS, AND TAPE AND REEL)standard by JEDEC Solid State

REFERENCE GUIDE TO LETTER SYMBOLS FOR SEMICONDUCTOR DEVICESstandard by JEDEC Solid State Technology Association, 05/01/2003

RECOMMENDED ESD TARGET LEVELS FOR HBM QUALIFICATIONstandard by JEDEC Solid State Technology Association, 07/01/2018

GUIDELINES FOR REPORTING AND USING ELECTRONIC PACKAGE THERMAL INFORMATIONstandard by JEDEC Solid State Technology Association, 05/01/2005

POWER AND TEMPERATURE CYCLINGstandard by JEDEC Solid State Technology Association, 01/01/2004

BOARD LEVEL DROP TEST METHOD OF COMPONENTS FOR HANDHELD ELECTRONIC PRODUCTSstandard by JEDEC Solid State Technology Association, 07/01/2003

FAILURE MECHANISMS AND MODELS FOR SEMICONDUCTOR DEVICESstandard by JEDEC Solid State Technology Association, 11/01/2010

STANDARD FOR DEFINITION OF CUA845 PLL CLOCK DRIVER FOR REGISTERED DDR2 DIMM APPLICATIONSstandard by JEDEC Solid State Technology Association, 01/01/2007

POWER CYCLINGstandard by JEDEC Solid State Technology Association, 08/01/2007