TEMPERATURE CYCLINGstandard by JEDEC Solid State Technology Association, 03/01/2009

GUIDELINES FOR GaAs MMIC AND FET LIFE TESTINGstandard by JEDEC Solid State Technology Association, 01/01/1993

DDR3 SDRAM Specificationstandard by JEDEC Solid State Technology Association, 07/01/2012

PROCUREMENT STANDARD FOR KNOWN GOOD DIE (KGD)standard by JEDEC Solid State Technology Association, 09/01/2005

RECOMMENDED STANDARD FOR THYRISTORSstandard by JEDEC Solid State Technology Association, 06/01/1972

RECOMMENDED ESD-CDM TARGET LEVELSstandard by JEDEC Solid State Technology Association, 10/01/2009

TERMINOLOGY AND METHODS OF MEASUREMENT FOR BISTABLE SEMICONDUCTOR MICROCIRCUITSstandard by JEDEC Solid State Technology Association, 11/01/1969

TEMPERATURE, BIAS, AND OPERATING LIFEstandard by JEDEC Solid State Technology Association, 11/01/2010

0.6 V Low Voltage Swing Terminated Logic (LVSTL06)standard by JEDEC Solid State Technology Association, 12/01/2016

DEFINITION OF SKEW SPECIFICATIONS FOR STANDARD LOGIC DEVICESstandard by JEDEC Solid State Technology Association, 09/01/2003

Mark Legibilitystandard by JEDEC Solid State Technology Association, 05/01/2011

TERMS, DEFINITIONS, AND LETTER SYMBOLS FOR DISCRETE SEMICONDUCTOR AND OPTOELECTRONIC DEVICESstandard by JEDEC Solid State Technology Association, 10/01/2009