DEFINITION OF CDCV857 PLL CLOCK DRIVER FOR REGISTERED DDR DIMM APPLICATIONSstandard by JEDEC Solid State Technology Association, 07/01/2000

EXTERNAL VISUALstandard by JEDEC Solid State Technology Association, 10/01/2015

SEMICONDUCTOR POWER CONTROL MODULESstandard by JEDEC Solid State Technology Association, 11/01/1986

HYBRIDS/MCMstandard by JEDEC Solid State Technology Association, 09/01/2005

SOLID STATE DRIVE (SSD) REQUIREMENTS AND ENDURANCE TEST METHODstandard by JEDEC Solid State Technology Association, 02/01/2011

MARK LEGIBILITYstandard by JEDEC Solid State Technology Association, 03/01/2008

EMBEDDED MULTIMEDIACARD (e*MMC) PRODUCT STANDARD, HIGH CAPACITYstandard by JEDEC Solid State Technology Association, 07/01/2007

STANDARD FOR DESCRIPTION OF 3877 - 2.5 V, DUAL 5-BIT, 2-PORT, DDR FET SWITCHstandard by JEDEC Solid State Technology Association, 11/01/2001

ASSESSMENT OF AVERAGE OUTGOING QUALITY LEVELS IN PARTS PER MILLION (PPM)standard by JEDEC Solid State Technology Association, 11/01/2017

Wide I/O Single Data Rate (Wide I/O SDR)standard by JEDEC Solid State Technology Association, 12/01/2011

EVALUATION PROCEDURE FOR DETERMINING CAPABILITY TO BOTTOM SIDE BOARD ATTACH BY FULL BODY SOLDER IMMERSION OF SMALL SURFACE MOUNT SOLID STATE DEVICESstandard

STRESS-TEST-DRIVEN QUALIFICATION OF INTEGRATED CIRCUITSstandard by JEDEC Solid State Technology Association, 04/01/2011