HSUL_12 LPDDR2 I/Ostandard by JEDEC Solid State Technology Association, 08/01/2009

ADDENDUM No. 1 TO EIA-397Amendment by JEDEC Solid State Technology Association, 07/01/1980

ADDENDUM No. 3 to JESD12 - CMOS GATE ARRAY MACROCELL STANDARDAmendment by JEDEC Solid State Technology Association, 06/01/1986

GUIDELINE FOR RESIDUAL GAS ANALYSIS (RGA) FOR MICROELECTRONIC PACKAGESstandard by JEDEC Solid State Technology Association, 11/01/2011

ADDENDUM No. 10 to JESD24 - TEST METHOD FOR MEASUREMENT OF REVERSE RECOVERY TIME trr FOR POWER MOSFET DRAIN-SOURCE DIODESAmendment by JEDEC

DEFINITION OF the SSTUB32865 28-bit 1:2 REGISTERED BUFFER WITH PARITY FOR DDR2 RDIMM APPLICATIONSstandard by JEDEC Solid State Technology Association, 05/01/2007

System Level ESD: Part II: Implementation of Effective ESD Robust Designsstandard by JEDEC Solid State Technology Association, 01/01/2013

THE MEASUREMENT OF SMALL-SIGNAL VHF-UHF TRANSISTOR ADMITTANCE PARAMETERSstandard by JEDEC Solid State Technology Association, 05/01/1970

DELPHI COMPACT THERMAL MODEL GUIDELINEstandard by JEDEC Solid State Technology Association, 10/01/2008

RECOMMENDED ESD TARGET LEVELS FOR HBM/MM QUALIFICATIONstandard by JEDEC Solid State Technology Association, 08/01/2008

SYMBOL AND LABEL FOR ELECTROSTATIC SENSITIVE DEVICESstandard by JEDEC Solid State Technology Association,

Serial Interface for Data Convertersstandard by JEDEC Solid State Technology Association, 01/01/2012