JEDEC JESD 12-5
ADDENDUM No. 5 to JESD12 - DESIGN FOR TESTABILITY GUIDELINESAmendment by JEDEC Solid State Technology Association, 08/01/1988
ADDENDUM No. 5 to JESD12 - DESIGN FOR TESTABILITY GUIDELINESAmendment by JEDEC Solid State Technology Association, 08/01/1988
THERMAL TEST BOARD STANDARDS TO ACCOMMODATE MULTI-CHIP PACKAGESstandard by JEDEC Solid State Technology Association, 12/01/2010
WIRE BOND SHEAR TESTstandard by JEDEC Solid State Technology Association, 04/01/2017
STANDARD FOR DESCRIPTION OF LOW-VOLTAGE TTL-COMPATIBLE BiCMOS LOGIC DEVICESstandard by JEDEC Solid State Technology Association, 05/01/1996
DRIVER SPECIFICATIONS FOR 1.8 V POWER SUPPLY POINT-TO-POINT DRIVERSstandard by JEDEC Solid State Technology Association, 11/01/2004
STRESS-TEST-DRIVEN QUALIFICATION OF INTEGRATED CIRCUITSstandard by JEDEC Solid State Technology Association, 08/01/2017
FOUNDRY PROCESS QUALIFICATION GUIDELINES - FRONT END TRANSISTOR LEVEL (Wafer Fabrication Manufacturing Sites)standard by JEDEC Solid State Technology Association, 09/01/2018
UNIVERSAL FLASH STORAGE (UFS) CARD EXTENSIONstandard by JEDEC Solid State Technology Association, 03/01/2016
Guidelines for Combining CIE 127-2007 Total Flux Measurements with Thermal Measurements of LEDs with Exposed Cooling Surfacestandard by JEDEC Solid State Technology
TEST METHOD FOR THE MEASUREMENT OF MOISTURE DIFFUSIVITY AND WATER SOLUBILITY IN ORGANIC MATERIALS USED IN INTEGRATED CIRCUITSstandard by JEDEC Solid State
NAND Flash Interface Interoperabilitystandard by JEDEC Solid State Technology Association, 07/01/2014