JEDEC JESD22-B106D
RESISTANCE TO SOLDER SHOCK FOR THROUGH-HOLE MOUNTED DEVICESstandard by JEDEC Solid State Technology Association, 04/01/2008
RESISTANCE TO SOLDER SHOCK FOR THROUGH-HOLE MOUNTED DEVICESstandard by JEDEC Solid State Technology Association, 04/01/2008
BUS INTERCONNECT LOGIC (BIC) FOR 1.2 Vstandard by JEDEC Solid State Technology Association, 11/01/2004
UNIVERSAL FLASH STORAGE (UFS) SECURITY EXTENSIONstandard by JEDEC Solid State Technology Association, 11/01/2016
RECOMMENDED PRACTICE FOR MEASUREMENT OF TRANSISTOR LEAD TEMPERATUREstandard by JEDEC Solid State Technology Association, 06/01/2004
FAILURE MECHANISMS AND MODELS FOR SEMICONDUCTOR DEVICESstandard by JEDEC Solid State Technology Association, 10/01/2011
Universal Flash Storage (UFS) Teststandard by JEDEC Solid State Technology Association, 03/01/2013
DDR2 DIMM CLOCK SKEW MEASUREMENT PROCEDURE USING A CLOCK REFERENCE BOARDstandard by JEDEC Solid State Technology Association, 05/01/2007
JOINT IPC/JEDEC STANDARD FOR MOISTURE/REFLOW SENSITIVITY CLASSIFICATION FOR NONHERMETIC SOLID STATE SURFACE-MOUNT DEVICESstandard by JEDEC Solid State Technology Association, 12/01/2014
STATISTICAL PROCESS CONTROL SYSTEMSstandard by JEDEC Solid State Technology Association, 02/01/2006
EMBEDDED MULTIMEDIACARD(e*MMC) e*MMC/CARD PRODUCT STANDARD, HIGH CAPACITY, including Reliable Write, Boot, Sleep Modes, Dual Data Rate, Multiple Partitions Supports, Security Enhancement, Background
.05 Low Voltage Swing Terminated Logic (LVSTL05)standard by JEDEC Solid State Technology Association, 06/01/2019
STANDARD FOR DESCRIPTION OF FAST CMOS TTL COMPATIBLE LOGICstandard by JEDEC Solid State Technology Association, 01/01/1993