TEST PROCEDURES FOR VERIFICATION OF MAXIMUM RATINGS OF POWER TRANSISTORSstandard by JEDEC Solid State Technology Association, 12/01/1967

COPLANARITY TEST FOR SURFACE-MOUNT SEMICONDUCTOR DEVICESstandard by JEDEC Solid State Technology Association, 09/01/2010

ENVIRONMENTAL ACCEPTANCE REQUIREMENTS FOR TIN WHISKER SUSCEPTIBILITY OF TIN AND TIN ALLOY SURFACE FINISHEDstandard by JEDEC Solid State Technology Association, 08/01/2008

PRODUCT DISCONTINUANCEstandard by JEDEC Solid State Technology Association, 12/01/2011

A PROCEDURE FOR MEASURING N-CHANNEL MOSFET HOT-CARRIER-INDUCED DEGRADATION UNDER DC STRESSstandard by JEDEC Solid State Technology Association, 12/01/2001

STANDARD FOR DESCRIPTION OF 3867 - 2.5 V, SINGLE 10-BIT, 2-PORT, DDR FET SWITCHstandard by JEDEC Solid State Technology Association, 11/01/2001

MARKING AND LABELING OF COMPONENTS, PCBs AND PCBAs TO IDENTIFY LEAD (Pb), Pb-FREE AND OTHER ATTRIBUTESstandard by JEDEC Solid State Technology Association,

Handling, Packing, Shipping and Use of Moisture, Reflow, and Process Sensitive Devicesstandard by JEDEC Solid State Technology Association, 04/01/2018

STANDARD LIST OF VALUES TO BE USED IN SEMICONDUCTOR DEVICE SPECIFICATIONS AND REGISTRATION FORMATstandard by JEDEC Solid State Technology Association, 10/01/1980

MEASUREMENT OF SMALL-SIGNAL TRANSISTOR SCATTERING PARAMETERSstandard by JEDEC Solid State Technology Association, 11/01/1972

FIELD-INDUCED CHARGED-DEVICE MODEL TEST METHOD FOR ELECTROSTATIC DISCHARGE WITHSTAND THRESHOLDS OF MICROELECTRONIC COMPONENTSstandard by JEDEC Solid State Technology Association, 12/01/2009

TERMS, DEFINITIONS, AND LETTER SYMBOLS FOR MICROCOMPUTERS, MICROPROCESSORS, AND MEMORY INTEGRATED CIRCUITSstandard by JEDEC Solid State Technology Association, 12/01/2002